Field
This disclosure relates the field of data processing systems. More particularly, this disclosure relates the suppression of read operations to a speculative register file.
Prior Art
It is known to provide data processing systems including an architected register file for storing committed register values within architected registers and a speculative register file for storing uncommitted register values within speculative registers. When a destination register requires allocation for an instruction, an available speculative register within the speculative register file is allocated to serve as the destination register for the instruction. The result operand value is subsequently returned to that allocated speculative register. When the commit point within the instruction stream reaches the instruction concerned, the value stored within the speculative register is transferred to the corresponding architected register as a committed register value and the speculative register de-allocated, such that it is available for the re-use.
When an instruction requires a source operand, a determination is made as to whether or not the source operand concerned is to be read from the speculative register file or the architected register file. The techniques for making such a determination will be familiar to those in the technical field of out-of-order processing within data processing systems. If the source operand value is not yet available, as it has not yet been at least written into the corresponding speculative register from which it is to be read, then the speculative register value will be identified as invalid and the instruction will not yet be dispatched.